Tag Archives: system clock frequency

Two-Wire LIN networking with Atmel (Part 4)

In the first part of this series we took a closer look at the basics of LIN networking, the key parameters for a two-wire LIN (Atmel) solution and the details of a LIN Bus power supply. In the second part of this series, we discussed various aspects of slave node current consumption, specifically, system clock frequency, sleep mode power management and LIN scheduling power management. In the third part of this series, we got up close and personal with slave node buffer capacitance, LIN Bus data protocol and a multi-slave evaluation network.

And today we’re going to explore a network start-up and the voltage regulator, a four node network (1 master, 3 slaves) and a five node network (1 master 4 slaves). Essentially, a multi-slave, two-wire LIN network can be implemented so long as the supply voltage to the slave node does not drop below the 5.5V minimum input voltage requirement of the ATA6617 voltage regulator. In this regard, extensive testing has shown that the network as currently configured cannot support more than three slave nodes at any one time.

Meaning, the effective load placed upon the LIN master pull-up resistor simply cannot source enough current to meet the minimum input voltage requirement under all operating conditions. Ultimately, the network is limited by the voltage drop across the LIN master pull-up resistor and the cumulative load induced by the multiple slave nodes. Adding slave nodes to the network will increase the effective load placed upon LIN master pull-up resistor.

“Simply put, the load placed upon Vbatt results in an increased voltage drop across the master pull-up resistor, RLIN, thus decreasing the input supply voltage to the slave nodes. If the input voltage falls below 5.5V, the minimum input voltage required for ATA6617 voltage regulator operation, the output will become unregulated and the slave node(s) will be rendered inoperable,” Atmel engineering rep Darius Rydahl told Bits & Pieces.

“In this mode of operation, the voltage regulator pass transistor behaves as a switch and the input voltage flows directly through to the regulator output. Voltage regulator current in this region is unstable and can be upwards of 3mA in excess of the normally regulated current. Operation in this unstable region will lead to non-linear increases in the voltage drop across the LIN master pull-up resistor, RLIN.”

As such, says Rydahl, increasing the number of slave nodes on the network greatly raises the risk that an “unregulated” voltage regulator condition will occur. This is due to the brief, but instantaneous spike in the load current of each slave node when power is initially supplied to the network at start-up.

Extra current is required to kick-start the voltage regulator of each slave node. Even though the average current consumption in the multi-slave network is approximately 0.8mA per slave node, an extra 2mA to 3mA of current must be factored into the overall current consumption of each node at start-up.

linenetworkingfigure10

In terms of a four-node network (1 Master, 3 Slaves), figure 10 shows the effect that the load has upon the LIN bus line at network power-on when three slave nodes are connected to the network. The plot clearly shows that slave node start-up briefly places an extra load on the network not seen during normal operation. At start-up, the LIN bus supply voltage hovers around 5.5V. Eventually, the slave node voltage regulators stabilize and the supply voltage settles to 8.2V. Network communication begins at this point.

linnetworkingfigure11

“On the five-node network (1 Master, 4 Slaves) side, figure 11 shows the start-up behavior when a fourth slave node is added to the network. In this case, the LIN bus supply voltage is never able to recover from the start-up load condition and hovers at 5V (0.5V below the minimum operating voltage of the voltage regulator). The measured voltage drop across the LIN master pull-up resistor in this case is 3.3V,” Rydahl continued.

linnetworkfigure3

“The load current through the 220Ω LIN master pull-up resistor under these conditions is calculated by: I RLIN = VRLIN / RLIN = 3.3 / 220 = 15mA. Referencing the plot from figure 3, one can see that the maximum load current supported by the 220Ω LIN master pull-up resistor is approximately 13mA at 5.5V. The 15mA load caused by the addition of the fourth slave node is 2mA greater than the two-wire LIN network can handle.”

As a result, the slave nodes fail to respond to the master frame requests. To mitigate this effect, consider the scenario where the slave nodes are started sequentially (one node after the other, not all at once). In this case, network communication will occur as shown in figure 12. Staggering the start-up of the individual slave nodes greatly reduces the current load on the network at reset, in effect increasing the node handling capabilities of the two-wire network.

linnetworkingfigure12

A network using this implementation could potentially run up to 12 slave nodes under the same network conditions; a) current per slave node is 0.8mA and b) 3mA voltage regulator start-up transient is limited to one slave node at a time. Then, I Slave_total = number of slaves × ISlave = 12 × 0.8 = 9.6mA and I Network = ISlave_total + IVreg_start = 9.6 + 3 = 12.6mA. It should probably be noted that the calculated current of 12.6mA is slightly below the 13mA maximum supply current that the LIN master is capable of supporting with a pull-up resistance of 220 ohms. In theory, says Rydahl, this network should be possible.

“The analysis and measurements here have shown that the existing LIN networking topology (three wires, battery, ground and LIN) can be easily transformed to a two-wire implementation (LIN and ground) with very little effort. All that is required is a thorough understanding of the system supply/load requirements and several hardware modifications to enable the slave node to harvest power from the master LIN bus line in between LIN data frame transmissions,” Rydahl added.

“The two-wire LIN network is best suited for low-node count networks where the system is limited to one master and no more than three slaves where all nodes are powered on simultaneously. The number of slave nodes could potentially be increased if the system designer is able to implement a power-on scheme where the slave nodes are activated serially to limit the surge current at network start-up.”

Interested in learning more about Two-Wire LIN networking with Atmel? Be sure to check out part one, two and three of this series.

Two-Wire LIN networking with Atmel (Part 3)

In the first part of this series, we took a closer look at the basics of LIN networking, the key parameters for a two-wire LIN (Atmel) solution and the details of a LIN Bus power supply. In the second part of this series, we discussed various aspects of slave node current consumption, specifically, system clock frequency, sleep mode power management and LIN scheduling power management.

And today we’re going to talk about slave node buffer capacitance, LIN Bus data protocol and a multi-slave evaluation network.

“While an important piece of the two-wire LIN equation, sizing of the slave node buffer capacitor, CVS_S, is not a dominant factor. The capacitor must provide sufficient charge reserve to power the slave node during a LIN frame data packet (LIN signal is periodically asserted low) and also receive a full charge between LIN frame data transmissions (the LIN signal is pulled up to system supply voltage),” Atmel engineering rep Darius Rydahl told Bits & Pieces.

“In practice, bench tests indicate that a buffer capacitor of 47μF to 100μF is sufficient to maintain power to the slave node for a network operating at a data rate of 19.2kbaud with a 100ms delay (or greater) between LIN data frames and a 9V minimum operating battery voltage.”

In terms of the LIN Bus Data Protocol, Rydahl notes that the format of the LIN bus data protocol will affect the charge/discharge rate of the slave node supply line buffer capacitor. Three (primary) factors affect the data format: Rate of data transfer, quantity of data transferred and LIN data schedule table period.

“The LIN bus data rate should be kept high, i.e., a maximum baud rate of 19.2kHz or higher to maximize the speed at which the data can be transferred. The quantity of data number of bits) should be kept as low as possible in order to minimize the duration of the dominant state (logic level low) on the LIN bus line,” he continued.

twowirelinfigure8

“And finally, the LIN schedule table period should be long enough in duration to allow the LIN bus powered slave node time to fully recharge the buffer capacitor, CVS_S, between LIN message frames. It should also be noted that most Atmel LIN transceivers are capable of baud rates in excess of the LIN specification.”

On the multi-slave evaluation network side, the two-wire LIN network used for test and characterization purposes is illustrated in figure 8. Essentially, the two-wire LIN network total node count is limited only by the LIN master pull-up resistor’s ability to source the required current to the attached slave nodes to maintain normal operation (slave node VS greater than 5.5V).

“Each node has been configured using the Atmel ATA6617-EK evaluation board (SiP: AVR MCU, ATtiny167 and Atmel SBC ATA6624),” said Rydahl. “This configuration provides one possible operating scenario and, as such, will most likely need to be modified to accommodate the end user’s application.”

The network utilizes the standard LIN protocol and does not deviate from the LIN2.x standard in any manner. The schedule table has been optimized for the two-wire LIN application where a LIN wake-up frame is followed by a single slave node frame shown in figure 9.

twolinfigure9

“Standard LIN protocol dictates that each node must process every incoming frame ID message on the bus. This forces each slave node to wake-up on every incoming message, regardless of ownership. Sending a wake-up frame followed by a single slave node frame minimizes the time that each slave node is powered ON,” he added.

“The alternate approach of sending a wake-up frame followed by a sequential burst of all the slave frames will cause slave nodes to remain awake longer than necessary. The end result is an overall increase in system load current—a scenario that should be avoided.”

Interested in learning more about Two-Wire LIN networking with Atmel? Be sure to check out part one and two of this series. Part four will run tomorrow.

Two-Wire LIN networking with Atmel (Part 2)

In the first part of this series we took a closer look at the basics of LIN networking, the key parameters for a two-wire LIN (Atmel) solution and the details of a LIN Bus power supply. In the second part of this series, we’ll discuss various aspects of slave node current consumption, specifically, system clock frequency, sleep mode power management and LIN scheduling power management.

According to Atmel engineering rep Darius Rydahl, the system clock frequency of the microcontroller (MCU) has the most significant effect on the slave node current consumption. The slave node current consumption is directly proportional to the clock frequency, an effect illustrated in Figure 4. Clearly, one should attempt to use the lowest clock frequency that enables the application to meet functional design requirements.

linnetworkingfigure4

In terms of power management-sleep mode, the overall current consumption of the two-wire LIN slave node can be further reduced by duty-cycling between low and high current operating modes, e.g. power-down/normal mode for the microcontroller and silent/normal mode for the LIN transceiver in between LIN data frames (see figure 5).

linnetworkingfigure5

Atmel AVR microcontrollers provide various sleep modes, allowing the user to tailor power consumption to the application’s requirements. In the case of the two-wire LIN application, the power-down mode provides the greatest current reduction when used in conjunction with the silent mode of the LIN transceiver,” Rydahl explained.

“In this mode, all generated clocks are shut down, allowing operation of asynchronous modules only (external interrupts, USI and watchdog). To wake up the microcontroller from power-down, the LIN master must first generate a LIN wake-up request followed by a LIN frame header. This process is shown in figure 6.”

linnetworkingfigure6

Upon wake-up, the microcontroller enters the normal mode and switches the EN pin (LIN transceiver enable) to HIGH at the start of each newly received LIN wake-up/frame packet.

During LIN data frames, the slave node microcontroller remains in normal mode and is able to provide an immediate data response upon receipt of the sync-break and message ID. At the end of the LIN data frame, the slave node returns to the power-down mode. It should be noted that operating the device in this manner will significantly reduce the average current consumption of the slave node.

On the subject of power management – LIN scheduling, the time between LIN frames, also known as the schedule table period, and the duration of the LIN frame define the power duty cycle of the slave node. This duty cycle affects the average current consumption of the two-wire LIN slave node. A typical LIN network operating at 19.2kbaud with a single frame, 8-bit message response has an average frame length of 2.95ms each. Figure 7 shows the effect of varying the schedule table period while connected to a slave node that is power duty cycling between power-down/silent and normal modes under these conditions.

linnetworkingfigure7

Clearly, lengthening the schedule table period reduces the slave node’s average current consumption. However, this benefit is bounded by the power-down/silent mode current and offers minimal benefit for schedule periods greater than one second.

Interested in learning more Two-Wire LIN networking with Atmel? Part one of this series can be read here, while part three will be posted tomorrow.