Tag Archives: Peripherals

Getting started with Atmel’s ATxmega32E5

Atmel’s ATxmega32E5 is a high-performance, low-power 8/16-bit AVR XMEGA microcontroller combining 32KB ISP flash memory (plus 4KB boot code section) with read-while-write capabilities, 1KB EEPROM, 4KB SRAM, 8-channel event system, a programmable multi-level interrupt controller, 26 general purpose I/O lines and one 16-bit real time counter.

xmegae5xplained1

“The MCU also boasts three flexible 16-bit timer/counters with compare modes and PWM, two USARTs (with SPI Master mode), one Two-Wire Interfaces (TWI) with SMBUs Level 1 support, one Serial Peripheral Interface (SPI) and one 16-channel/12-bit 300kSPS A/D converter with optional differential input with programmable gain,” an Atmel engineering rep told Bits & Pieces.

“In addition, there is one two-channel 12-bit 1MSPS D/A converter, two analog comparators with window mode, a programmable watchdog timer with separate internal oscillator, accurate internal oscillators with PLL and prescaler and programmable brown-out detection.”

Meanwhile, an XMEGA Custom Logic module (XCL) consisting of two independent 8-bit timer/counters and two lookup tables used for defining glue logic rounds out the above list of features.

“Essentially, it is designed to reduce bill of material (BOM) and PCB size as the XCL can replace external circuitry such as delay elements, RS-latches, D-latches, D-flip-flowps chip-select logic, AND, NAND, OR, NOR, XOR, XNOR, NOT, MUX AND/OR/XOR logic gates,” the engineering rep continued. “Together with the USART, the XMEGA Custom Logic module can be used to enable customized communication protocols. Simply put, by executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz,  neatly balancing power consumption and processing speed.”

To accelerate development with the ATxmega32E5 microcontroller, Atmel offers the XMEGA-E5 Xplained, a hardware-based platform that allows engineers to more easily evaluate the device. The kit offers a range of features that enable devs to quickly kick off projects with ATxmega32E5 peripherals, as they learn how to integrate the AVR device in various designs.

Aside from the ATxmega32E5 microcontroller, key XMEGA-E5 Xplained features include:

  • OLED display with 128×32 pixels resolution
  • Ambient light sensor
  • Analog filter
  • Digital I/O
  • Two mechanical buttons
  • Two user LEDs
  • Four expansion headers
  • Board controller with USB interface
  • One power LED and one status LED

Interested in learning more? The XMEGA-E5 Xplained can be purchased from Atmel’s official store here.

The Peripheral Event System in Atmel’s SAM4L ARM Cortex-M4 based Microcontroller

Atmel’s SAM4L ARM Cortex-M4 based MCU has inherently low current consumption for such a powerful chip. But it also has a Peripheral Event System that allows you to service interrupts or external conditions without waking up the core processor.

Periphereal-Event-System-for-SAM4L-Cortex-M4

Periphereal Event-System for Atmel’s SAM4L Cortex-M4

Keeping your microcontroller unit in sleep mode will reduce system power consumption. Increasing the throughput will reduce the time spent in active mode. Atmel’s Peripheral Event System allows peripherals to communicate directly with each other without involving the CPU (central processing unit). It is a routing network independent of traditional data paths such as system buses. Peripherals can trigger events such as data transfer to another peripheral or the copying of a message directly to the MCU internal memory. All this can happen while the processor is asleep. You spare the CPU from the time-consuming handling of interrupts since the Peripheral Event System is doing these repetitive tasks. This will free up more time for the MCU to handle other tasks in the application, or allow the MCU to remain in sleep mode for a longer time. The Peripheral Event System lowers power consumption and increases performance.

You can read more about conserving power in an Atmel white paper: Redefining the power benchmark.