Tag Archives: LCGW

ATmega256RFR2 powers low-cost Ethernet to wireless gateways: Part 3

Earlier this week, Bits & Pieces introduced Atmel’s low-cost gateway (LCGW) reference design, powered by the versatile ATmega256RFR2 and WIZnet W5200. We explored the basics of the platform, including operation and CPU functions. We also took a closer look at the W5200 chip, memory, power system and antennae. Today, we will be diving into possible LCGW enclosures, regulatory compliance, debugging and software resources.

As we all know, users can be very creative with their enclosure designs. However, there are some basic guidelines for wireless devices. Perhaps most importantly, any metal or conductive material within 4 inches (10cm) of the antenna will have an effect on the far field radiation pattern. As such, metal enclosures should not be used. It is also recommended to keep metal parts such as screws, nuts and washers, metallic labels away from the PCB antenna area. Indeed, there are holes in the LCGW design which act as the preferred location for non-conductive fasteners.


In terms of regulatory compliance, the LCGW has been pre-tested for FCC Class B and CE compliance. Initial pre-scan data indicates this design is compliant with US and EU regulations. To obtain regulatory certification, developers will have to perform regulatory testing of their product in its final form – including enclosure and all application specific features. Although results may vary, the positive pre-scan results are reassuring and indicate the probability of successful certification is high.

The Atmel ATmega256RFR2 SoC used in the LCGW has a special Band-edge filter feature, which improves out-of-band rejection for channels 25 and 26 (2475 and 2480MHz.) The FCC defines a “Restricted Band” from 2483 to 2500MHz, meaning emissions in this Restricted Band are required to be below 54dBµV (500µV/m). Because of this requirement, many IEEE 802.15.4 devices are not able to use high power in channels 25 and 26. Nevertheless, the Band-edge filter feature of Atmel RFR2 radios allows the use of higher power in these channels. It should be noted that the FCC pre-scan data cited in this Bits & Pieces article was taken using the full output power of the  ATmega256RFR2  (+3.5dBm) and the Band-Edge feature enabled. The filer can be enabled by setting PLL_TX_FLT (bit 4) in the TRX_CTRL_1 (0x144) register.

On the debugging side, the DCP power inlet is fused for safety purposes. So if the Power-Good LED fails to light, be sure to check the fuse. If the fuse has blown and needs to be replaced, the root cause should be determined before putting the device back into service. For replacement parts, a 1 Amp 0603 SMT fuse is recommended (Bourns SF-0603S100, or equivalent). Do not use flipped CAT5 cables and be sure to exercise caution when connecting to Power Test Header J5, as this header exposes 5VDC and may damage low voltage GPIO or UART cables.

Although leveraging the 3.3V supply for light external loads is permissible, be advised that the 3.3V LDO has limitations on available line current, load current and thermal dissipation, so exceeding these limits may cause a malfunction. However, at maximum transmitter power, the Atmel  ATmega256RFR2  may exceed emissions limits in the 2483 to 2500MHz restricted band. This can be corrected by enabling the PLL_TX_FLT bit in the TRX_CTRL_1 register. Note – this special bandedge filtering feature of the Atmel RFR2 family allows use of high-power in channels 25 and 26.

Last, but certainly not least, Atmel supplies many network stacks that run on the ATmega256RFR2  These include the BitCloud ZigBee stacks, ZigBee Pro, ZigBee Light Link and ZigBee Home Automation, IEEE 802.15.4 MAC and the Atmel proprietary Light-Weight Mesh network stack.

Interested in learning more about Atmel’s low-cost gateway (LCGW) reference design? Be sure to check out part one  and two of this series.

ATmega256RFR2 powers low-cost Ethernet to wireless gateways: Part 2

Yesterday, Bits & Pieces introduced Atmel’s low-cost gateway (LCGW) reference design, powered by the versatile ATmega256RFR2 and WIZnet W5200. We explored the basics of the platform, including operation and CPU functions. And today we will be taking a closer look at the W5200 chip, memory, power system and antennae.


As noted in part one of this series, the W5200 chip can best be described as a hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using Serial Peripheral Interface (SPI). W5200 is probably best suited for those users who require Internet connectivity for applications that use a single chip to implement TCP/IP stack, 10/100 Ethernet MAC and PHY.

Indeed, the W5200 is composed of a fully hardwired market-proven TCP/IP stack and an integrated Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE – which has been proven in various applications for many years. W5200 employs a 32KB internal buffer as its data communication memory. By using W5200, users can implement the Ethernet application they need by using a simple socket program instead of handling a complex Ethernet Controller.

On the memory side, the LCGW is designed with two external memory devices onboard. More specifically, the Atmel AT24MAC402 2-Kbit TWI EEPROM is intended for persistent storage of EUI-48 or EUI-64 addresses. This device can be used to store MAC addresses, credentials, calibration data, manifests and security keys.

The AT24MAC EEPROM also has a hardwired address of 0x0, while the LCGW includes an Atmel AT45DB642 4-Mbit SPI flash memory for in-the-field upgrades, web-site storage, logs, electronic data sheets (TEDS) or general purpose scratch pad. Although these two memory devices are useful for gateway and data concentrator applications, they are optional and can be omitted to further reduce BOM cost.

In terms of power, DC power is derived from a USB Dedicated Charging Port (DCP) inlet.

“The LCGW can be powered from common mobile-device chargers or USB ports on Wi-Fi access points or PCs using a USB Micro-B cable. For safety, the power bus is protected by an SMT fuse and ESD/EMI suppression circuitry,” an Atmel engineering rep told Bits & Pieces. “USB supplies 5VDC, while a linear buck-regulator supplies the 3.3VDC rail for the CMOS devices. Connector J5 exposes the 5VDC and 3.3VDC rails for testing. The Power-Good indicator, D1, will light if both 5VDC and 3.3VDC are present. Additional low-voltage rails are regulated and filtered by the Ethernet sub-system.”

The engineering rep also noted that the the RF front end of the LCGW antenna is designed for low-cost and high efficiency.

“That is why a PCB dipole antenna was chosen – because it does not require an external balun or specialized RF components which add cost. Plus, the relatively large area of this dipole design significantly increases the effective area and antenna aperture,” the engineering rep continued. “Larger antenna aperture dramatically improves receiver efficiency, sensitivity and range. This dipole antenna offers performance superior to chip antennas for receiving weak signals from remote nodes in marginal conditions. This antenna design is on par with high-performance external monopole antennas at a fraction of the cost.”

In addition, the antenna radiation pattern of the LCGW is moderately directional. This can be used to advantage by adjusting the orientation to bring in weak signals. Conversely, conductive objects and obstructions can be placed in the null zones to reduce adverse effects. It should be emphasized, though, that the un-populated PCB area around the antenna is essential to sustain a strong electric field, which radiates from both sides of the PCB, top and bottom. As such, it is important to avoid placing conductors, labels or stickers in this area.

Interested in learning more about Atmel’s low-cost gateway reference design? Be sure to check back tomorrow for part three of our in-depth look at the ATmega256RFR2-powered LCGW.