Tag Archives: CPU

Cosino Enigma is an SAMA5D3 based CPU module

Powered by the Atmel | SMART ARM Cortex-A5 based SAMA5D3HCE Engineering has introduced the latest development in its Cosino Project: the Cosino Enigma CPU module.

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As previously discussed on Bits & Piecesthe Cosino Project is an embedded prototyping system that combines the functionality of a mini-computer with those of a professional automation system. Cosino includes a comprehensive lineup of CPU boards, carrier boards and multiple peripherals that support industrial applications, as well as countless DIY projects by Makers.

With the recent launch of the Cosino Enigma, the team will now enrich their offering of Atmel based MPU modules. This new CPU module supports secure boot, which allows a user to store all of their software in an encrypted form on the system’s mass memory, therefore making it inaccessible to unauthorized intrusions!

How the secure boot works

Enigma’s CPU has two way of functioning: normal mode and secure mode. In the former mode, the CPU is no different than all other CPUs; however, once the secure mode is activated, it will execute ONLY encrypted code.

In normal mode, the boot stages consist of:

  1. The on-chip ROM bootloader loads the pre-bootloader from an external mass storage into the internal RAM, then
  2. The pre-bootloader sets up the external RAM and loads the bootloader from an external mass storage into external RAM, then
  3. The bootloader can setup some peripherals in order to prepare the system for the kernel and loads the kernel from an external mass storage into external RAM, then
  4. The kernel activates all system’s peripherals and mounts the rootfs from an external mass storage and starts the user’s processes executions.

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Starting from stage 2, all the software that is not coded in ROM can be potentially subjected to attempts to replace the original firmware with a malicious one, simply by altering the code images stored into the system’s mass storage memory.

In industry applications this can lead to several issues related to system security. For instance, let’s consider a biomedical application where the system MUST not work continuously for more than 2 hours. The manufacturer can program the software in order to respect this directive; however, a malicious user may gain access to the system’s mass storage, copy it and then modify it in such a way that the machine can now work for more than 2 hours!

How can the manufacturer protect itself? It can simply use the secure mode!

Once the secure mode is activated, the Enigma’s CPU will execute ONLY encrypted code. In fact, when in secure mode, the internal ROM boot loader (during stage 1), will load the pre-bootloader image and it will then decrypt it by using the AES algorithm with the secret key deeply stored into the CPU.

Note that the AES key is not readable by using any CPU instruction nor the JTAG which is disabled too!

It’s obvious that without knowing the secret key is quite difficult to alter the pre-bootloader code! While, we have just shown that the second stage is secure, by using the same trick for both stage 3 and 4, all the booting chain is secure as well.

But, what about the root file system? Several solutions may be used; however, the SAMA5D3 based Cosino Enigma solution is used as an embedded file system into the kernel, and in the event that large data storage is needed, to mount an encrypted partition.

What the secure boot cannot do

Despite the secure mode, your system is not protected against backdoors and programming bugs, but these issues are NOT due the secure mode but due weak programmers! The secure mode can assure that your code cannot be altered and/or read so, if your code is well-written, the system is strongly protected against malicious attacks.

The secure boot and the Libre Software

Since Cosino Enigma runs a complete GNU/Linux system, how can it fit within the open source/free software licences? The answer: the unlock track.

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By damaging this track on the board, the user can unlock the system; that is, even in secure mode the CPU can run unencrypted code, so every open source/free software licence is respected! Of course, the manufacturer can release the open source/free software code but NOT its protected code.

In addition, the integrity of the unlock track can be used to assert the warranty integrity; once damaged, the unlock path can assert that the warranty is now void. The open source/free software licence is saved and the manufacturer can decline all responsibility against any software modifications.

Hardware overview

The newly-unveiled board features a vast range of I/O peripherals and communication ports. Along with the TFT touchscreen LCD panels driver capable of resolutions up to 1024×768 pixels, it makes the Cosino Engima quite suitable for human/machine interfaces, gateways, and industrial controllers.

Aside from the ARM Cortex-A5 based SAMA5D3, other key specs include:

  • Internal hardware floating-point unit
  • 256MB (optional 512) SDRAM DDR2
  • 256MB NAND
  • 1x Ethernet 10/100 (optional 1000)
  • 2x USB Host 2.0
  • 1x USB Host/Device 2.0
  • 2x microSD
  • 7x UART
  • 1x LCD
  • 1x real-time clock1
  • 1x I2C
  • 2x SPI
  • 1x crypto engine
  • 1x true number generator

Interested in learning more? You can check out Cosino’s official page here.

ATmega328P + ARM Cortex-A7 = Akarel

Akarel – which recently surfaced on Indiegogo – is a hardware development kilt that integrates Atmel’s ATmega328P microcontroller (MCU) and a 1GHz Allwinner A20 dual-core ARM Cortex-A7 processor (CPU) on a single board with a touch screen.

As Akarel creator Karel Kyovsky notes, the platform is targeted at devs and Makers who require a touch screen interface to implement their respective projects.

The development platform is currently available in two iterations: Akarel 7 (7-inch display) and Akarel22 (22-inch display). The former features an industrial grade projected capacitive multi touch connected via I2C, while the latter is equipped with a USB-linked capacitive single touch.

“Some development kits are missing displays or touch, [while] others use obscure software stacks. Imagine implementing your hack ideas within hours instead of days like you’ve been doing until now,” Kyovsky explained.

“Akarel integrates Android OS running on [the] ARM Cortex A7 via UART, with Arduino software running on [Atmel’s] ATmega328P MCU. Integration and connection of both chips on [a single] PCB [offers a number of] advantages.”

According to Kyovsky, these include:

  • 

Graphics and UI capabilities of Google’s flagship Android OS
  • Optimized environment for application development
  • Seamless network connectivity via WiFi or Ethernet
  • Access to extensive Arduino community libraries

Kyovsky says he envisions Akarel being used to develop smart home automation and security systems, kiosks/payment terminals, along with Internet of Things (IoT) devices and appliances.

On the software side, the Akarel kit offers Makers and developers access to a Git repository stocked with Uboot source code, Linux kernel source (3.4.39), fine-tuned Android OS sources (4.2.2), Arduino firmware sources, Arduino tools (i.e. avrdude) and example apps.

“We want you to concentrate on writing an application not on spending time to make the basic things work. We have done it for you already. And if you want to dive deeper and modify the Linux kernel or Android OS…Why not? You have all the sources available for you to change and compile,” Kyovsky added.

“In order to save you from the hell of installing all the toolchain (correct version of gcc, libs, headers, automake, make, java, you name it) we have also prepared a Ubuntu virtual machine for you which may be downloaded and which has [the entire] toolchain preinstalled so that you can start recompiling your complete stack within a few minutes.”

Interested in learning more about the Akarel? You can check out the project’s official Indiegogo page here.

A PIR motion activated camera with Atmel & ARM

A PIR motion activated camera is typically deployed as a security measure to detect, record and identify an unauthorized intruder. Key design considerations of such a device include false alarm immunity, extended battery life, low BOM cost and small form factor.

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A number of Atmel-based components can be used to build a PIR motion activated camera that follows the above-mentioned design requirements. Firstly, Atmel’s ARM-based (Cortex-M4) SAM4S16 is capable of achieving fast image capture along with compression, all while transferring the data back to the control center – thereby facilitating rapid visual verification and response.

“Perhaps most importantly, Atmel’s SAM4S16 offers low power operation to extend battery life, with embedded peripherals running independently from the CPU,” an Atmel engineering rep told Bits & Pieces.

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“So that means PIR sensing and image capturing without CPU load. More specifically, single snapshot mode =>30uA/day -10 years of battery life (3V, 2800mAh Li-Ion).”

Similarly, Atmel’s 86RF212B/233RF transceiver offers low-power operation with Sleep Mode down to 0.02uA.

“Developers can also save on total BOM cost and reduce design form factor, as Atmel’s SAM4S16 is capable of independently handling image encoding and processing with software,” the engineering rep continued.  “In addition, the Atmel-based design (SAM4S16) allows the removal of one external amplifier interfacing PIR Sensor via the embedded ADC with gain stage. Plus, the SAM4S16 directly connects to any CMOSImageSensor, all while providing color picture capture at QVGA resolution.”

On the software side, developers have easy access to the SAM4S evaluation kit (Xplained Pro), along with Atmel Studio, Gallery and free libraries, including FreeRTOS, TCP/IP Stacks and 802.15.4 Stacks.

Interested in learning more about Atmel’s ARM-powered SAM4S16? Be sure to check out the official SAM4S16 page here.

32-bit AVR MCUs for automotive applications (Part 2)

In the first part of this series, we took a closer look at how Atmel’s AVR low-power 32-bit microcontrollers (MCUs) help enable the implementation of various product-differentiating features, including advanced control algorithms, voice control and capacitive touch sensing.

We also discussed powering Atmel’s AVR UC3C 32-bit automotive-grade microcontrollers with either a 3.3V or a 5V supply (generally supporting 5V I/O). This has been achieved by moving to a modified 0.18-micron process technology, which supports higher I/O voltage levels in a reliable and cost-effective manner without any complex and expensive voltage conversion. In addition to supporting 5V I/O, the UC3C has been designed to support a wide range of high-performance peripherals required by automotive applications, including:

  • ADC: 16 channels with 12-bit resolution at up to 1.5M samples/second; dual sample and hold capabilities; built-in calibration; internal and external reference voltages.
  • DAC:  Four outputs (2 x 2 channels) with 12-bit resolution; up to 1M sample/second conversion rate with 1us settling time; flexible conversion range; one continuous or two sample/hold outputs per channel.
  • Analog comparator:  Four channels with selectable power vs. speed; selectable hysteresis (0.20mV and 50mV); flexible input selections and interrupts; window compare function by combining two comparators.
  • Timer/Counter: multiple clock sources (five internal and three external); rich feature set (counter, capture, up/down, PWM); two input/output signals per channel; global start control for synchronized operation.
  • Quadrature decoder: Integrated decoder supports direct motor rotation detection.
  • Multiple interfaces: includes a two-channel, two-wire interface (TWI), master/slave SPI, and full-featured USART that can be used as an SPI or LIN.
  • Fully integrated USB:  built-in USB 2.0 transceivers support low (1.5Mbps), full (12Mbps) and on-the-go modes; included in the AVR Software Framework are production-ready drivers for various USB devices (mass storage, HID, CDC, audio), hosts (mass storage, HID, CDC) and combined function devices.

Atmel’s AVR UC3C 32-bit automotive-grade microcontrollers are also designed to achieve higher system throughput with our Peripheral Event System.

“Managing peripherals by the CPU can become a major system bottleneck, especially as the number of peripherals and their operating frequencies increase. With high sampling rates across multiple channels, interrupt overhead and data processing can consume a large percentage of the processor’s available clock cycles,” an Atmel engineering rep told Bits & Pieces. “If the CPU load needs to manage a single SPI port even at a low data rate of 1.2Mbps, this would require 53% of the processor’s capacity. In addition, the interrupt latency increases and introduces jitter.”

And that is why AVR UC3C architecture utilizes Atmel’s peripheral event system, which allows CPU-independent handling of inter-peripheral signaling through an internal communication fabric that interconnects all peripherals. Rather than triggering an interrupt to tell the CPU to read a peripheral or port, the peripheral instead manages itself by directly transferring data to the SRAM for storage – all without requiring any action by the CPU.

“From a power perspective, only those blocks that are part of the conversion are active. The CPU is free to execute application code or conserve power in idle mode during the entire event,” the Atmel engineering rep continued. “In addition, the peripheral event controller allows a more deterministic response compared to a CPU-based, interruptdriven event controller, because the latency is fixed to 3 cycles, i.e., 33ns when operating at 66MHz. This enables precise timing of events without jitter, resulting in constant sample rates for ADCs and DACs.”

Interested in learning more about 32-bit AVR MCUs for automotive applications? Be sure to check out part three of this series which details how Atmel MCUs can be used to help protect IP and bolster system safety. Interested in learning more about 32-bit AVR MCUs for automotive applications? Be sure to check out part onetwothree and four of this series.

ATmega256RFR2 powers low-cost Ethernet to wireless gateways: Part 1

Atmel’s low-cost gateway (LCGW) reference design – powered by the ATmega256RFR2 – is a turn-key production-ready solution that connects IEEE 802.15.4 wireless networks to wired Ethernet networks. This gateway allows IEEE 802.15.4 wireless devices to link with mobile devices such as smartphones and tablets running remote-control applications.

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“The ATmega256RFR2 wireless system-on-a-chip (SoC) combines best-in-class radio performance with the efficient Atmel AVR 8-bit CPU,” an Atmel engineering rep told Bits & Pieces. “In short, the ATmega256RFR2 provides a responsive CPU and high-performance radio to address the demanding tasks of network coordinator and data concentrator.”

Meanwhile, the WIZnet W5200 embedded Ethernet controller features a 10BaseT/100BaseTX MAC and PHY, supporting numerous popular Ethernet protocols including TCP/IP, UDP and IPv4.

“Essentially, the wired Ethernet interface is a low-cost, reliable and secure connection that works with the end user’s existing routers, access-points, WLANs and ISPs,” the engineering rep continued. “Remember, wired Ethernet lowers cost and also avoids interference problems and regulatory issues inherent with co-located radio solutions.”

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The engineering rep also noted that the reference design was formulated with low BOM cost as a primary objective. As such, the design is free of superfluous accessories and non-essential sub-systems, with a standard JTAG interface provided for programming and debug.

Atmel’s design includes optional EEPROM and Data-Flash memory sockets, while DC power is derived from a USB Micro-B Dedicated Charge Port (DCP) – allowing users to power the gateway with common phone chargers or from Wi-Fi Access Points via USB ports. As expected, both the USB and Ethernet connections have ESD/EMI suppression to improve reliability.

In terms of operation, connections to the LCGW are relatively simple. Connect the DCP to a USB power source using the Micro-B connector and D3 will light indicating DC power is ready. Then, connect the RJ45 Ethernet port to a router with a CAT5 patch cable.

“Atmel’s ATmega256RFR2 can be programmed and debugged using the 10-pin JTAG header and Atmel JTAGICE programmers. SW2 is a hardware RESET for the CPU, while Ethernet MAC Reset is driven by software,” the engineering rep explained. “And J5 exposes the power rails for testing. There are several user defined features: UART0, Port F GPIO, SW1 and D1 are uncommitted and available to the application developer.”

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On the CPU side, Atmel’s  ATmega256RFR2 is a low-power CMOS 8-bit microcontroller based on AVR enhanced RISC architecture combined with a high data rate transceiver for the 2.4GHz ISM band. By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz allowing system designers to optimize power consumption versus processing speed. Meanwhile, the radio transceiver provides high data rates from 250kb/s up to 2Mb/s, frame handling, outstanding receiver sensitivity and high transmit output power enabling a very robust wireless communication.

Interested in learning more about Atmel’s low-cost gateway reference design? Be sure to check back tomorrow for part two of our in-depth look at the ATmega256RFR2-powered LCGW.

Low-power design in the age of IoT

Facilitating low-power designs for electronic devices is more important than ever before as we move toward a world dominated by the Internet of Things (IoT).

Essentially, the IoT refers a future scenario in which all types of electronic devices link to each other via the Internet. Today, it’s estimated that there are nearly 10 billion devices in the world connected to the Internet, a figure expected to triple to nearly 30 billion by 2020.

The challenge? Reducing power consumption (to extend battery life) while simultaneously maintaining acceptable levels of performance. Fortunately, Atmel has been focusing on low power consumption for more than ten years across its extensive portfolio of AVR and ARM-based microcontrollers and embedded microprocessors.

Design techniques employed to achieve the critical balance between power consumption and performance include:

  • Use of hardware DMA and event system to offload the CPU
  • Cut clock or supply on device portions not in use
  • Careful balance of high performance and low leakage transistors
  • Fast wake up from low power modes
  • Low voltage operation

“With the Atmel picoPower technology found in our AVR 8-bit and 32-bit microcontrollers, we’ve even gone one step further. All picoPower devices are designed from the ground up for lowest possible power consumption – all the way from transistor design and process geometry, to sleepmodes and flexible clocking options,” an Atmel engineering rep told Bits & Pieces.

“Atmel picoPower devices can operate down to 1.62V while still maintaining all functionality, including analog functions. They have short wake-up time, with multiple wake-up sources from even the deepest sleep modes.”

Although certain elements of picoPower tech cannot be directly configured by the user, they do form a solid base that facilitates ultra-low-power application development without compromising functionality. On the user level, flexible and powerful features and peripherals allow engineers to more easily apply a wide range of techniques to reduce a system’s total power consumption even further. As expected, picoPower technology is also relatively simple to deploy, with both basic and advanced techniques reducing the power consumption of an application even further.

A perfect example of Atmel’s commitment to low-power devices is the 0.7V tinyAVR. Remember, a typical microcontroller requires at least 1.8V to operate – while the voltage of a single battery-cell ranges from 1.2V to 1.5V when fully charged, dropping gradually below 1V during use (yet still holding a reasonable amount of charge). This means the average microcontroller requires at least two battery cells.

“We have solved this problem by integrating a boost converter inside the ATtiny43U, converting a DC voltage to a higher level and bridging the gap between minimum supply voltage of the microcontroller and the typical output voltages of a standard single cell battery,” the Atmel engineering rep explained. “The boost converter provides the microcontroller with a fixed supply voltage of 3.0V from a single battery cell even when the battery voltage drops down to 0.7V.”

Simply put, this extends battery life by allowing non-rechargeable batteries to be drained to the minimum, while programmable shut-off levels above the critical minimum voltage level avoid damaging the battery cell of rechargeable batteries.

Interested in learning more about Atmel’s low-power, high performance portfolio? Be sure to check out our extensive ARM and AVR product lineups here.

Atmel’s AVR UC3: Low power & ease of use

Atmel’s AVR UC3 has popped up in quite a number of use recent cases on Bits & Pieces, so today we will be taking a closer look at the stalwart microcontroller (MCU) family which is built on high-performance 32-bit AVR architecture and optimized for highly integrated applications.

Essentially, the AVR UC3 delivers high computational throughput, deterministic real-time control, low-power consumption, low system cost, high reliability and ease-of-use. As previously discussed on Bits & Pieces, the AVR CPU boasts a plethora of cutting-edge features including integer and fixed point DSP (digital signal processor) arithmetic and single-cycle multiply-accumulate instructions.

Meanwhile, a dual-port SRAM, peripheral DMA (direct memory access) controller and multi-layer, high-speed bus architecture makes the AVR UC3  core ideal for high-throughput applications. As such, AVR UC3  devices are perfectly suited for portable and battery-powered applications due to their optimized low-power properties.

Another important feature of Atmel’s AVR UC3 is picoPower technology, which allows the AVR UC3 to further extend the battery life of portable devices.

“True 1.62V operation means  selected AVR UC3 devices can utilize a 1.8V (± 10%) regulated power supply – with all functions working,” an Atmel engineering rep told Bits & Pieces. “Indeed, picoPower AVR UC3 devices consume only 650nA with the RTC (real time clock) running, enabling ultra-low sleep current combined with fast wake-up for high integrated microcontrollers.”

On the security side, selected AVR UC3 devices provide mechanisms to protect the system from unauthorized modification, flash software theft and runaway code. Atmel’s FlashVault code protection allows CPU resources and sections of code/data memory to be reserved for proprietary software IP or critical sections of code/data, while a special API (application programming interface) is used to access these resources from the rest of the code. Attempts to access these resources by circumventing this API (either by hacking or runaway code) will be aborted and result in an exception.

In terms of the Digital Signal Processor, the 32-bit AVR UC3 offers unrivaled DSP performance compared to legacy architectures.

“By including powerful instructions for single cycle, multiply accumulate and fractional multiply for various number formats, the 32-bit AVR UC3 delivers unrivaled DSP (digital signal processor) performance compared to legacy architectures,” the Atmel engineering rep noted. “In the AVR UC3  software framework more than 70 DSP functions have been assembly optimized utilizing these instructions. In short, DSP has never been easier.”

And last, but certainly not least, Atmel’s peripheral DMA (direct memory access) controller sets a new standard for data transfer efficiency. For example, if the peripheral DMA controller is not enabled, the maximum usable transfer rate on the SPI (serial peripheral interface) module would be approximately 1MBit/s – occupying the CPU with more than 50% load just moving data around. However, with the peripheral DMA controller, this bottleneck is removed and the Atmel AVR UC3 microcontroller can achieve a transfer rate of 33MBit/s on SPI and USART with only a 15% load on the CPU.

“The innovative peripheral event system in the AVR UC3 also represents a paradigm shift, as it allows the AVR UC3 to send signals (events) directly to other peripherals without involving the CPU. This ensures short and predictable response time. At the same time it offloads the CPU and reduces power consumption,” the engineering rep added.

Want to learn more about Atmel’s lineup AVR UC3 MCUs? Be sure to check out our official UC3 page here.