How Ethernet AVB is playing a central role in automotive streaming applications

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Ethernet is emerging as the network of choice for infotainment and advanced driver assistance systems, Atmel’s Tim Grai explains.

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Imagine you’re driving down the highway with the music blaring, enjoying the open road. Now imagine that the sound from your rear speaker system is delayed by a split second from the front; your enjoyment of the fancy in-car infotainment system comes to a screeching halt.

Ethernet is emerging as the network of choice for infotainment and advanced driver assistance systems that include cameras, telematics, rear-seat entertainment systems and mobile phones. But standard Ethernet protocols can’t assure timely and continuous audio/video (A/V) content delivery for bandwidth intensive and latency sensitive applications without buffering, jitter, lags or other performance hits.

Audio-Video Bridging (AVB) over Ethernet is a collection of extensions to the IEEE802.1 specifications that enables local Ethernet networks to stream time synchronised, loss sensitive A/V data. Within an Ethernet network, the AVB extensions help differentiate AVB traffic from the non-AVB traffic that can also flow through the network. This is done using an industry standard approach that allows for plug-and-play communication between systems from multiple vendors.

The extensions that define the AVB standard achieve this by:

• reserving bandwidth for AVB data transfers to avoid packet loss due to network congestion from ‘talker’ to ‘listener(s)’
• establishing queuing and forwarding rules for AVB packets that keep packets from bunching and guarantee delivery of packets with a bounded latency from talker to listener(s) via intermediate switches, if needed
• synchronizing time to a global clock so the time bases of all network nodes are aligned precisely to a common network master clock, and
• creating time aware packets which include a ‘presentation time’ that specifies when A/V data inside a packet has to be played.

Designers of automotive A/V systems need to understand the AVB extensions and requirements, as well as how their chosen microcontroller will support that functionality.

AVB: A basket of standards

AVB requires that three extensions be met in order to comply with IEEE802.1:

• IEEE802.1AS – timing and synchronisation for time-sensitive applications (gPTP)
• IEEE802.1Qat – stream reservation protocol (SRP)
• IEEE802.1Qav – forwarding and queuing for time-sensitive streams (FQTSS).

In order to play music or video from one source, such as a car’s head unit, to multiple destinations, like backseat monitors, amplifiers and speakers, the system needs a common understanding of time in order to avoid lags or mismatch in sound or video. IEEE802.1AS-2011 specifies how to establish and maintain a single time reference – a synchronised ‘wall clock’ – for all nodes in a local network. The generalized precision time protocol (gPTP), based on IEEE1588, is used to synchronize and syntonize all network nodes to sub-microsecond accuracy. Nodes are synchronized if their clocks show the same time and are syntonised if their clocks increase at the same rate.

This protocol selects a Grand Master Clock from which the current time is propagated to all network end-stations. In addition, the protocol specifies how to correct for clock offset and clock drifts by measuring path delays and frequency offsets. New MCUs, such as the Atmel | SMART SAMV7x (shown above), detect and capture time stamps automatically when gPTP event messages cross MII layers. They can also transport gPTP messages over raw Ethernet, IPv4 or IPv6. This hardware recognition feature helps to calculate clock offset and link delay with greater accuracy and minimal software load.

Meanwhile, SRP guarantees end-to-end bandwidth reservation for all streams to ensure packets aren’t delayed or dropped at any switch due to network congestion, which can occur with standard Ethernet. For the in-vehicle environment, SRP is typically configured in advance by the car maker, who defines data streams and bandwidth allocations.

Talkers (the source of A/V data) ‘advertise’ data streams and their characteristics. Switches process these announcements from talker and listeners to:

• register and prune streams’ path through the network
• reserve bandwidth and prevent over subscription of available bandwidth
• establish forwarding rules for incoming packets
• establish the SRP domain, and
• merge multiple listener declarations for the same stream

The standard stipulates that AVB data can reserve only 75% of total available bandwidth, so for a 100Mbit/s link, the maximum AVB data is 75Mbit/s. The remaining bandwidth can be used for all other Ethernet protocols.

In automotive systems, the streams may be preconfigured and bandwidth can be reserved statically at system startup to reduce the time needed to bring the network into a fully operational state. This supports safety functions, such as driver alerts and the reversing camera, that must be displayed within seconds.

SRP uses other signalling protocols, such as Multiple MAC Registration Protocol, Multiple VLAN Registration Protocol and Multiple Stream Registration Protocol to establish bandwidth reservations for A/V streams dynamically.

The third extension is FQTSS, which guarantees that time sensitive A/V streams arrive at their listeners within a bounded latency. It also defines procedures for priority regenerations and credit based traffic shaper algorithms to meet stream reservations for all available devices.

The AVB standard can support up to eight traffic classes, which are used to determine quality of service. Typically, nodes support at least two traffic classes – Class A, the highest priority, and Class B. Microcontroller features help manage receive and transmit data with multiple priority queues to support AVB and ‘best effort class’ non AVB data.

Automotive tailored requirements

Automotive use cases typically fix many parameters at the system definition phase, which means that AVB implementation can be optimised and simplified to some extent.

• Best Master Clock algorithm (BMCA): the best clock master is fixed at the network definition phase so dynamic selection using BCMA isn’t needed.
• SRP: all streams, their contents and their characteristics are known at system definition and no new streams are dynamically created or destroyed; the proper reservation of data is known at the system definition phase; switches, talkers and listeners can have their configurations loaded at system startup from pre-configured tables, rather than from dynamic negotiations
• Latency; while this is not critical, delivery is. Automotive networks are very small with only a few nodes between a talker and listener. It is more important not to drop packets due to congestion.

Conclusion

The requirement to transfer high volumes of time sensitive audio and video content inside vehicles necessitates developers to understand and apply the Ethernet AVB extensions. AVB standardization results in interoperable end-devices from multiple vendors that can deliver audio and video streams to distributed equipment on the network with micro-second accuracy or better. While the standard brings complexities, new MCUs with advanced features are simplifying automotive A/V design.

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This article was originally published on New Electronics on October 13, 2015 and authored by Tim Grai, Atmel’s Director of Automotive MCU Application Engineering. 

How to prevent execution surprises for Cortex-M7 MCU

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We know the heavy weight linked with software development, in the 60% to 70% of the overall project cost.

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The ARM Cortex-A series processor core (A57, A53) is well known in the high performance market segments, like application processing for smartphone, set-top-box and networking. If you look at the electronic market, you realize that multiple applications are cost sensitive and don’t need such high performance processor core. We may call it the embedded market, even if this definition is vague. The ARM Cortex-M family has been developed to address these numerous market segments, starting with the Cortex-M0 for lowest cost, the Cortex-M3 for best power/performance balance, and the Cortex-M4 for applications requiring digital signal processing (DSP) capabilities.

For the audio, voice control, object recognition, and complex sensor fusion of automotive and higher-end Internet of Things sensing, where complex algorithms for audio and video are needed for rich audio and visual capabilities, Cortex-M7 is required. ARM offers the processor core as well as the Tightly Coupled Memory (TCM) architecture, but ARM licensees like Atmel have to implement memories in such a way that the user can take full benefit from the M7 core to meet system performance and latency goals.

The TCM interface provides a single 64-bit instruction port and two 32-bit data ports.

In a 65nm embedded Flash process device, the Cortex-M7 can achieve a 1500 CoreMark score while running at 300 MHz, offering top class DSP performance: double-precision floating-point unit and a double-issue instruction pipeline. But algorithms like FIR, FFT or Biquad need to run as deterministically as possible for real-time response or seamless audio and video performance. How do you best select and implement the memories needed to support such performance? If you choose Flash, this will require caching (as Flash is too slow) leading to cache miss risk. Whereas SRAM technology is a better choice since it can be easily embedded on-chip and permits random access at the speed of processor.

Peripheral data buffers implemented in general-purpose system SRAM are typically loaded by DMA transfers from system peripherals. The ability to load from a number of possible sources, however, raises the possibility of unnecessary delays and conflicts by multiple DMAs trying to access the memory at the same time. In a typical example, we might have three different entities vying for DMA access to the SRAM: the processor (64-bit access, requesting 128 bits for this example) and two separate peripheral DMA requests (DMA0 and DMA1, 32-bit access each). Atmel has get round this issue by organizing the SRAM into several banks as described in this picture:

By organizing the SRAM into banks, multiple DMA bursts can occur simultaneously with minimal latency.

For a chip maker designing microcontrollers, licensing ARM Cortex-M processor core provides numerous advantages. The very first is the ubiquity of the ARM core architecture, being adopted in multiple market segments to support variety of applications. If this chip maker wants to design-in a new customer, the probability that such OEM has already used ARM-based MCU is very high, and it’s very important for this OEM to be able to reuse existing code (we know the heavy weight linked with software development, in the 60% to 70% of the overall project cost). But this ubiquity generates a challenge: how do you differentiate from the competition when competitors can license exactly the same processor core?

Selecting a more aggressive technology node and providing better performance at lower cost are an option, but we understand that this advantage can disappear as soon as the competition also move to this node. Integrating larger amount of Flash is another option, which is very efficient if the product is designed on a technology that enables it to keep the pricing low enough.

If the chip maker has designed on an aggressive technology node for higher performance and offers a larger amount of Flash than the competition, it may be enough differentiation. Completing with the design of a smarter memory architecture unencumbered by cache misses, interrupts, context swaps, and other execution surprises that work against deterministic timing allow bringing strong differentiation.

If you want to more completely understand how Atmel has designed this SMART memory architecture for the Cortex-M7, I encourage you to read this white paper from Jacko Wilbrink and Lionel Perdigon entitled “Run Blazingly Fast Algorithms with Cortex-M7 Tightly Coupled Memories.” (You will have to register.) This paper describes MCUs integrating SRAM organized into four banks that can be used as general SRAM and for TCM, showing one example of a Cortex-M7 MCU being implemented in the Atmel | SMART SAM S70, SAM E70 and SAM V70/V71 families.

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This post has been republished with permission from SemiWiki.com, where Eric Esteve is a principle blogger, as well as one of the four founding members of the site. This blog was originally shared on August 6, 2015.

4 designs tips for AVB in-car infotainment

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AVB is clearly the choice of several automotive OEMs, says Gordon Bechtel, CTO, Media Systems, Harman Connected Services.

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Audio Video Bridging (AVB) is a well-established standard for in-car infotainment, and there is a significant amount of activity for specifying and developing AVB solutions in automobiles. The primary use case for AVB is interconnecting all devices in a vehicle’s infotainment system. That includes the head unit, rear-seat entertainment systems, telematics unit, amplifier, central audio processor, as well as rear-, side- and front-view cameras.

The fact that these units are all interconnected with a common, standards-based technology that is certified by an independent market group — AVnu — is a brand new step for the automotive OEMs. The AVnu Alliance facilitates a certified networking ecosystem for AVB products built into the Ethernet networking standard.

According to Gordon Bechtel, CTO, Media Systems, Harman Connected Services, AVB is clearly the choice of several automotive OEMs. His group at Harman develops core AVB stacks that can be ported into car infotainment products. Bechtel says that AVB is a big area of focus for Harman.

AVB Design Considerations

Harman Connected Services uses Atmel’s SAM V71 microcontrollers as communications co-processors to work on the same circuit board with larger Linux-based application processors. The software firm writes codes for customized reference platforms that automotive OEMs need to go beyond the common reference platforms.

Based on his experience of automotive infotainment systems, Bechtel has outlined the following AVB design dos and don’ts for the automotive products:

1. Sub-microsecond accuracy: Every AVB element on the network is hooked to the same accurate clock. The Ethernet hardware should feature a time stand to ensure packet arrival in the right order. Here, Bechtel mentioned the Atmel | SMART SAM V71 MCU that boasts screen registers to ensure advanced hardware filtering of inbound packets for routing to correct receive-end queues.

2. Low latency: There is a lot of data involved in AVB, both in terms of bit rate and packet rate. AVB allows low latency through reservations for traffic, which in turn, facilitate faster packet transfer for higher priority data. Design engineers should carefully shape the data to avoid packet bottlenecks as well as data overflow.

Bechtel once more pointed to Atmel’s SAM V71 microcontrollers that provide two priority queues with credit-based shaper (CBS) support that allows the hardware-based traffic shaping compliant with 802.1Qav (FQTSS) specifications for AVB.

3. 1588 Timestamp unit: It’s a protocol for correct and accurate 802.1 AS (gPTP) support as required by AVB for precision clock synchronization. The IEEE 802.1 AS carries out time synchronization and is synonymous with generalized Precision Time Protocol or gPTP.

Timestamp compare unit and a large number of precision timer counters are key for the synchronization needed in AVB for listener presentations times and talker transmissions rates as well as for media clock recovery.

4) Tightly coupled memory (TCM): It’s a configurable high-performance memory access system to allow zero-wait CPU access to data and instruction memory blocks. A careful use of TCM enables much more efficient data transfer, which is especially important for AVB class A streams.

It’s worth noting that MCUs based on ARM Cortex-M7 architecture have added the TCM capability for fast and deterministic code execution. TCM is a key enabler in running audio and video streams in a controlled and timely manner.

AVB and Cortex-M7 MCUs

The Cortex-M7 is a high-performance core with almost double the power efficiency of the older Cortex-M4. It features a six-stage superscalar pipeline with branch prediction — while the M4 has a three-stage pipeline.  Bechtel of Harman acknowledged that M7 features equate to more highly optimized code execution, which is important for Class A audio implementations with lower power consumption.

Again, Bechtel referred to the SAM V71 MCUs — which are based on the Cortex-M7 architecture — as particularly well suited for the smaller ECUs. “Rear-view cameras and power amplifiers are good examples where the V71 microcontroller would be a good fit,” he said. “Moreover, the V71 MCUs can meet the quick startup requirements needed by automotive OEMs.”

The infotainment connectivity is based on Ethernet, and most of the time, the main processor does not integrate Ethernet AVB. So the M7 microcontrollers, like the V71, bring this feature to the main processor. For the head unit, it drives the face plate, and for the telematics control, it contains the modem to make calls so echo cancellation is a must, for which DSP capability is required.

Take the audio amplifier, for instance, which receives a specific audio format that has to be converted, filtered and modulated to match the requirement for each specific speaker in the car. This means infotainment system designers will need both Ethernet and DSP capability at the same time, which Cortex-M7 based chips like V71 provide at low power and low cost.

What is real SAM V71 DSP performance in automotive audio?

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The integrated FPU DSP (into the Cortex-M7 core) is using 2X the number of clock cycles when compared with the SHARC21489.

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Thinking of selecting an ARM Cortex-M7-based Atmel SAM V70/71 for your next automotive entertainment application? Three key reasons to consider are the clock speed of the the Cortex-M7 (300 Mhz), the integration of a floating point (FPU) DSP, and last but not least, because the SAM V70/71 has obtained automotive qualification. If you delve deeper into the SAM V70/71 features list, you will see that this MCU is divided into several versions integrating Flash: 512 KB, 1024 KB or 2018 KB. And, if you compare with the competition, this MCU is the only Cortex-M7 supporting the 2 MB Flash option, being automotive qualified and delivering 1500 CoreMark — thanks to the 300 MHz clock speed when the closest competitor only reach 240 MHz and deliver 1200 CoreMark.

In fact, what makes the SAMV70/71 so unique is its FPU DSP performance. Let’s make it clear for the beginning, if you search for pure DSP performance, it will be easy to find standard DSP chip offering much higher performance. Take the Analog Device AD21489 or Blackfin70x series, for example. However, the automotive market is not only very demanding, it’s also a very cost sensitive market as well.

Think about this simple calculation: If you select AD21489 DSP, you will have to add external flash and a MCU, which would lead the total BOM to be four to five times the price associated with the SAM V71. (Let’s also keep this AD21489 as a reference in terms of performance, and examine DSP benchmark results, coming from third party DSP experts DSP Concept.)

Before analyzing the results, we need to describe the context:

• FIR is made on 256 samples block size
• Results are expressed in term of clock cycles (smaller is better)
• All DSP are floating-point except Blackfin
• Clock cycles count is measured using Audio Weaver

To elaborate upon that even further, this FIR is used to build equalization filter — the higher Taps count, the better. If we look at the “50 Taps” benchmark results, the SAM V71 (Cortex-M7 based) exhibits 22,734 clock cycles (about three times more than the SHARC21489). Unsurprisingly, the Cortex-M4 requires 50% more, but you have to integrate a Cortex-A15 to get better results, as both the Cortex-A8 and Cortex-A9 need 30% and 40% more cycles, respectively! And when looking at standard Analog Devices Blackfin DSP, only the 70x series is better by 35%… the 53x being 30% worst.

Now, if you want to build a graphic equalizer, you will have to run Biquad. For instance, when building eight channels and six stages graphic equalizer, your DSP will have to run 48 Biquad.

Again, the context:

• Biquad is made on 256 samples block size
• Results are expressed in term of clock cycles (smaller is better)
• All DSP are floating-point except Blackfin
• Clock cycles count is measured using Audio Weaver

In fact, the results are quite similar to those of the FIR benchmark: only the Cortex-A15 and the SHARC21489 exhibits better performance. The integrated FPU DSP (into the Cortex-M7 core) is using twice the amount of clock cycles when put side-by-side with the SHARC21489. If you compare the performance per price, the Cortex-M7 integrated in the SAMV71 is 50% cheaper! Using a SHARC DSP certainly makes sense if you want to build high performance home cinema system, but if you target automotive, it’s much more effective to select a FPU DSP integrated together with Flash (512KB to 2MB) and a full featured MCU.

The Atmel SAM V71 is specifically dedicated to support automotive infotainment application, offering Dual CAN and Ethernet MAC support. Other notable specs include:

• 10/100 Mbps, IEEE1588 support
• 12 KB SRAM plus DMA
• AVB support with Qav & Qas HW support for audio traffic support
• 802.3az Energy efficiency support
• Dual CAN-FD
• Up to 64 SRAM-based mailboxes
• Wake up from sleep or wake up modes on RX/TX

Don’t forget that when looking to construct an automotive high-end radio, you still need room for Ethernet MAC and AVB support… What’s more, the SAM V71 only consume 68% of the DSP resource, leaving well enough space for both AVB and Ethernet MAC.

Interested? Explore the Atmel | SMART SAM V ARM Cortex-M7 family here. More information about the the DSP benchmark can be also found on DSP Concept’s website.  Also, be sure the detailed DSP Concept’s audio processing benchmarks.

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This post has been republished with permission from SemiWiki.com, where Eric Esteve is a principle blogger as well as one of the four founding members of SemiWiki.com. This blog first appeared on SemiWiki on May 6, 2015.

Single chip MCU + DSP architecture for automotive = SAM V71

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Automotive apps are running in production by million units per year, and cost is a crucial factor when deciding on an integrated solution.

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It’s all about Cost of Ownership (CoO) and system level integration. If you target automotive related application, like audio or video processing or control of systems (Motor control, inverter, etc.), you need to integrate strong performance capable MCU with a DSP. In fact, if you expect your system to support Audio Video Bridging (AVB) MAC on top of the targeted application and to get the automotive qualification, the ARM Cortex-M7 processor-based Atmel SAMV70/71 should be your selection: offering the fastest clock speed of his kind (300 MHz), integrating a DSP Floating Point Unit (FPU), supporting AVB and qualified for automotive.

Let’s have a closer look at the SAM V71 internal architecture, shall we?

A closer look at Atmel | SMART ARM based Cortex M7 – SAMV71 internal architecture.

When developing a system around a microcontroller unit, you expect this single chip to support as many peripherals as needed in your application to minimize the global cost of ownership. That’s why you can see the long list of system peripherals (top left of the block diagram). Meanwhile, the Atmel | SMART SAM V71 is dedicated to support automotive infotainment application, e.g. Dual CAN and Ethernet MAC (bottom right). If we delve deeper into these functions, we can list these supported features:

• 10/100 Mbps, IEEE1588 support
• MII (144-pin), RMII (64-, 100, 144-pin)
• 12 KB SRAM plus DMA
• AVB support with Qav & Qas HW support for Audio traffic support
• 802.3az Energy efficiency support
• Dual CAN-FD
• Up to 64 SRAM-based mailboxes
• Wake up from sleep or wake up modes on RX/TX

The automotive-qualified SAM V70 and V71 series also offers high-speed USB with integrated PHY and Media LB, which when combined with the Cortex-M7 DSP extensions, make the family ideal for infotainment connectivity and audio applications. Let’s take a look at this DSP benchmark:

ARM CM7 Performance normalized relative to SHARC (Higher numbers are better).

If you are not limited by budget consideration and can afford integrating one standard DSP along with a MCU, you will probably select the SHARC 21489 DSP (from Analog Devices) offering the best-in-class benchmark results for FIR, Biquad and real FFT. However, such performance has a cost, not only monetarily but also in terms of power consumption and board footprint — we can call that “Cost of Ownership.” Automotive apps are running in production by million units per year, and cost is absolutely crucial in this market segment, especially when quickly deciding to go with an integrated solution.

To support audio or video infotainment application, you expect the DSP integrated in the Cortex-M7 to be “good enough” and you can see from this benchmark results that it’s the case for Biquad for example, as ARM CM7 is equal or better than any other DSP (TI C28, Blackfin 50x or 70x) except the SHARC 21489… but much cheaper! Good enough means that the SAMV70 will support automotive audio (Biquad in this case) and keep enough DSP power for Ethernet MAC (10/100 Mbps, IEEE1588) support.

Ethernet AVB Architectures (SAM V71)

In the picture above, you can see the logical SAM V71 architectures for Ethernet AVB support and how to use the DSP capabilities for Telematics Control Unit (TCU) or audio amplifier.

Integrating a DSP means that you need to develop the related DSP code. Because the DSP is tightly integrated into the ARM CM7 core, you may use the MCU development tools (and not specific DSP tools) for developing your code. Since February, the ATSAMV71-XULT (full-featured Xplained board, SAM V71 Xplained Ultra Evaluation Kit with software package drivers supporting basic drivers, software services, libraries for Atmel SAMV71, V70, E70, S70 Cortex-M7 based microcontrollers) is available from Atmel. As this board has been built around the feature-rich SAM V71, you can develop your automotive application on the same exact MCU architecture as the part going into production.

Versatility and Integrated DSP built into the ARM CM7 core allows for MCU development tools to be used instead of having to revert to specific DSP tools. You can develop your automotive application on exactly the same MCU architecture than the part going into production.

Interested? More information on this eval/dev board can found here.

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This post has been republished with permission from SemiWiki.com, where Eric Esteve is a principle blogger as well as one of the four founding members of SemiWiki.com. This blog first appeared on SemiWiki on April 29, 2015.

Atmel launches new series of Atmel | SMART ARM Cortex-M7 based MCUs

Atmel has expanded upon its Atmel | SMART ARM-based microcontroller family with the launch of four new series of Cortex-M7 based devices.

The new series deliver the highest performing Cortex-M7 based MCUs to the market with exceptional memory and connectivity options for design flexibility making them ideal for the automotive, Internet of Things (IoT) and industrial connectivity markets.

“As one of the first ARM licensees, we are excited to be among the first suppliers to introduce a portfolio of ARM Cortex-M7 based MCUs,” said Jacko Wilbrink, Atmel Senior Marketing Director. “Our family of Cortex-M7 based devices broaden the Atmel | SMART Cortex-M based MCUs and provide a robust feature set tailored for the automotive, industrial, consumer and IoT markets giving designers the next level of performance, along with advanced high-speed connectivity, high density on-chip memory and a solid ecosystem to meet every designers needs. We look forward to seeing more applications in the market adopt our Cortex-M7 based devices.”

All devices enable customers to scale-up performance and deliver SRAM and system functionality, while keeping the Cortex-M processor family ease-of-use and maximizing software reuse. The devices contain advanced memory architectures with up to 384KB of multi-port SRAM memory out of which 256KB can be configured as tightly coupled memory delivering zero wait state access at 300MHz. With over four times the performance of current Atmel ARM Cortex-M based MCUs running up to 300MHz, larger configurable SRAM up to 384kB and higher bandwidth peripherals, the new devices give designers the right connectivity, SRAM and performance mix for their industrial, connectivity and automotive designs. All devices come with high-speed USB On-the-Go (OTG) and on-chip high-speed USB PHY and Flash memory densities of 512kB, 1MB and 2MB.

Broadening the Atmel | SMART ARM Cortex-M based MCU portfolio, the new SAM E70 and the SAM S70 are ideal for connectivity and general purpose industrial applications, while the auto-grade SAM V70 and SAM V71 are perfectly suited for in-vehicle infotainment, audio amplifiers, telematics and head unit control.

Atmel | SMART SAM E and SAM S Series

Atmel’s SAM S70 series is based on the ARM Cortex-M7 core plus a floating point unit (FPU) extending the general purpose product portfolio with maximum operating speeds up to 300MHz, up to 2MB of Flash, dual 16KB of cache memory and up to 384KB of SRAM with an extensive peripheral set including high-speed USB host and device plus high-speed PHY, up to 8 UARTs, I2S, SD/MMC interface, a CMOS camera interface, system control and analog interfaces.

In addition to the SAM S70 series features, Atmel’s SAM E70 series include a 10/100 Ethernet MAC and Dual Bosch CAN-FD interfaces with advanced analog features making them ideal for connectivity applications. The SAM E70 is upwards compatible with Atmel’s SAM4E series.

Atmel | SMART SAM V Series

The automotive-qualified SAM V70 and V71 series offer unique Ethernet AVB support, high-speed USB with integrated PHY and Media LB, which, when combined with the Cortex-M7 DSP extensions, make the series ideal for infotainment connectivity and audio applications. The series also offers the latest CAN 2.0 and CAN flexible data rate controller for higher bandwidth requirements.

“Atmel was a lead partner for the ARM Cortex-M7 processor launch in October 2014 and the milestone of shipping automotive-qualified SoCs demonstrates significant progress,” shared Richard York, ARM Vice President of Embedded Marketing. “Atmel’s broad family of Cortex-M7 based MPUs provide high performance, advanced connectivity, flexible memory options and a solid ecosystem tailored for the automotive, industrial and general connectivity markets.”

Interested in learning more? You can check out the entire Atmel | SMART family here.