Tag Archives: ATA6641/42 System Basis Chip (SBC)

Designing next-gen LIN systems with Atmel (Part 3)

In the first part of this series, Bits & Pieces took a closer look at LIN, or Local Interconnect Network for vehicles. In part two, we discussed Atmel’s next-generation ATA6641/42 System Basis Chip (SBC) with an eight-channel high-voltage switch interface, a LIN2.1 and SAEJ2602-2-compliant LIN transceiver and lowdrop voltage regulator. We also talked about the SBC’s switch interface unit, or more specifically, switch inputs, switch monitoring (detection) and interrupt requests. In part three, we’re going to get up close and personal with voltage measurement, PWM control, H-Bridge relays and LIN auto-addressing.

In terms of voltage measurement, the I/O ports not only contain a high-voltage (HV) comparator for simple switches but also a voltage divider.


The low-voltage signal—which is linearly dependent on the input voltage—is provided at the VDIV pin to enable analog voltage measurements on the high-voltage pins by using the ADC of the application’s microcontroller. In addition, the VDIV pin—which can be sourced either by the VBATT pin or one of the switch input pins CS1 to CS8—guarantees a voltage and temperature-stable output ratio of the selected input.

On the subject of PWM control, the ATA6641/42’s switch interface current sources can be used to directly control pulse-width-modulated loads (such as LEDs). The PWM signal applied to the CSPWM input pin is used as control signal for the chosen current sources at the corresponding I/O ports.


This PWM signal can be applied to each I/O pin, as the CSPWM input pin accepts logic-level signals (such as those from the microcontroller) and is equipped with a pulldown structure so that, in case of an open connection, this input is well defined.

Up next is H-bridge Relay Control, as the ATA6641/42 can easily be used as a relay driver. If the 20mA output current of each I/O-port is not sufficient to drive the load, it is possible to connect the output pins together to achieve a higher load current. In the example shown in figure 8 three outputs are tied together.


This results in a minimum output current of 3 x 20mA = 60mA. As an additional safety feature, the CS1 and CS2 high-voltage interface pins are used as sensor inputs for checking proper relay operation. The relays are configured as H-bridges, allowing a motor to be driven in both directions. A typical application for this configuration is a window lifter.

Last up is LIN Auto-addressing. After switching on the network, and before the communication begins, each LIN slave node will be assigned a unique address.


Typically this address is implemented by hardwiring, programming (OTP or bitwise), special connectors, or DIP switches. Common to all the methods mentioned is the configuration of the system or the replacement of a faulty slave node requires manual action. The only way to avoid the latter is to store the slave nodes using different addresses.

In contrast to these methods, auto-addressing means that completely identical slave nodes can be connected to the LIN network without having to distinguish their addresses. The addresses of the individual nodes are assigned according to their position on the bus. Another solution is an automatic addressing process called slave node position detection. In this case, the master assigns the node addresses of the slaves during initialization. As all LIN nodes are in a wired AND connection, all bus connections are equal and thus not able to detect their position on the bus on their own. Additional measures are required to detect the relative position of every slave on the bus.

There are a number of methods that can be leveraged to achieve this, although an Atmel engineering rep told Bits & Pieces the ATA6641/42 is perfectly suited for an extra wire daisy chain scenarios because the two high-voltage I/O ports can be used as a high-side and low-side switch (figure 9 above shows the basic functionality of this method using the ATA6641/42).

“This method allows absolutely identical LIN slaves to be connected to the LIN bus without end-of-line or connector pin programming. All LIN slaves need to provide two extra pins; in the case of the ATA6641/42 these are the high voltage I/O CS1 and CS2 ports. Both are able to switch to VS or to GND,” the Atmel engineering rep explained. “The CS1 pin is the data input, and the CS2 pin is the data output. The CS1 data input of the first slave node is connected to the data output of the master. The output of the first node CS2 is connected to the input CS1 of the second node and so on, resulting in a daisy chain.”

The addressing procedure starts with all outputs (CS2) set to high level with the exception of the master. This means that the first slave node following the master node is detected by a low level at its data input. The first node selected in this way takes the address from the LIN configuration message from the master.


“This first slave node switches its data output CS2 to GND and the second slave node thus has a low level at its CS1 data input. The second slave node then takes the address from the LIN configuration message and switches its output CS2 to GND. These steps are repeated until all slave nodes have an address,” the engineering rep added. (Note: figure 10 demonstrates this method with an ambient light control application using the ATA6641/42).

Interested in learning more? Part one of this series can be read here and part two is available here.