Yesterday, Bits & Pieces introduced Atmel’s low-cost gateway (LCGW) reference design, powered by the versatile ATmega256RFR2 and WIZnet W5200. We explored the basics of the platform, including operation and CPU functions. And today we will be taking a closer look at the W5200 chip, memory, power system and antennae.
As noted in part one of this series, the W5200 chip can best be described as a hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using Serial Peripheral Interface (SPI). W5200 is probably best suited for those users who require Internet connectivity for applications that use a single chip to implement TCP/IP stack, 10/100 Ethernet MAC and PHY.
Indeed, the W5200 is composed of a fully hardwired market-proven TCP/IP stack and an integrated Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE – which has been proven in various applications for many years. W5200 employs a 32KB internal buffer as its data communication memory. By using W5200, users can implement the Ethernet application they need by using a simple socket program instead of handling a complex Ethernet Controller.
On the memory side, the LCGW is designed with two external memory devices onboard. More specifically, the Atmel AT24MAC402 2-Kbit TWI EEPROM is intended for persistent storage of EUI-48 or EUI-64 addresses. This device can be used to store MAC addresses, credentials, calibration data, manifests and security keys.
The AT24MAC EEPROM also has a hardwired address of 0x0, while the LCGW includes an Atmel AT45DB642 4-Mbit SPI flash memory for in-the-field upgrades, web-site storage, logs, electronic data sheets (TEDS) or general purpose scratch pad. Although these two memory devices are useful for gateway and data concentrator applications, they are optional and can be omitted to further reduce BOM cost.
In terms of power, DC power is derived from a USB Dedicated Charging Port (DCP) inlet.
“The LCGW can be powered from common mobile-device chargers or USB ports on Wi-Fi access points or PCs using a USB Micro-B cable. For safety, the power bus is protected by an SMT fuse and ESD/EMI suppression circuitry,” an Atmel engineering rep told Bits & Pieces. “USB supplies 5VDC, while a linear buck-regulator supplies the 3.3VDC rail for the CMOS devices. Connector J5 exposes the 5VDC and 3.3VDC rails for testing. The Power-Good indicator, D1, will light if both 5VDC and 3.3VDC are present. Additional low-voltage rails are regulated and filtered by the Ethernet sub-system.”
The engineering rep also noted that the the RF front end of the LCGW antenna is designed for low-cost and high efficiency.
“That is why a PCB dipole antenna was chosen – because it does not require an external balun or specialized RF components which add cost. Plus, the relatively large area of this dipole design significantly increases the effective area and antenna aperture,” the engineering rep continued. “Larger antenna aperture dramatically improves receiver efficiency, sensitivity and range. This dipole antenna offers performance superior to chip antennas for receiving weak signals from remote nodes in marginal conditions. This antenna design is on par with high-performance external monopole antennas at a fraction of the cost.”
In addition, the antenna radiation pattern of the LCGW is moderately directional. This can be used to advantage by adjusting the orientation to bring in weak signals. Conversely, conductive objects and obstructions can be placed in the null zones to reduce adverse effects. It should be emphasized, though, that the un-populated PCB area around the antenna is essential to sustain a strong electric field, which radiates from both sides of the PCB, top and bottom. As such, it is important to avoid placing conductors, labels or stickers in this area.
Interested in learning more about Atmel’s low-cost gateway reference design? Be sure to check back tomorrow for part three of our in-depth look at the ATmega256RFR2-powered LCGW.