Lewihe unveils its Sneaker 3D printer

Earlier this summer, Makers Juan Tendero, Jordi Tendero and Jose Manuel Quiles announced that they would launch a new 3D printer, capable of printing Filaflex filament at speeds faster than any other desktop machine on the market today. In doing so, the team had launched its Lewihe 3D printer on Indiegogo, seeking $60,000 to further production. While they were unable to garner the targeted amount, the group did utilize the pledged $11,105 to expand their capabilities.

lew2-1024x514

Now a couple of months later, the team has resurfaced to announce that they will be unveiling another printer, the Lewihe Sneaker. Though larger than the company’s previous machines, the Sneaker will still be based on the same core XY system. Each of the recently-announced devices are powered by an Atmel AT90USB1286 based SAV Mk-I board.

ATML

Built on an aluminum alloy chassis, the Sneaker’s key specs include:

  • Print Technology: Fused Filament Fabrication
  • Build Volume: 320 x 210 x 210 mm
  • Print speed: 120 mm/s
  • Printer Size: 48 x 35 x 46 cm
  • Printer Weight: 14 kg (30 lbs)
  • Layer Resolution: 50 microns
  • Filament Type/Size: 1.75 mm PLA & Filaflex
  • Nozzle Diameter: 0.4 mm
  • Software: Cura, Repetier, Pronterface, Octoprint
  • 3D Model File Types: .stl, .gcode, .obj

In addition, the printer features an optional camera (with 320 x 240 resolution) for those Makers wishing to monitor their prints remotely, as well as Wi-Fi connectivity. Wishing to add the Lewihe Sneaker to your holiday list? You’re in luck. The company says it will be available starting in December.

1 thought on “Lewihe unveils its Sneaker 3D printer

  1. embeddist

    Reblogged this on embeddist and commented:
    플랫폼른 점점 가격이 떨어지고 대량생산만들어가면 3D Printer값도 현실적이 되겠네 ㅋㅋ AT90USB:
    The high-performance, low-power Atmel 8-bit AVR RISC-based microcontroller combines 128KB ISP flash memory with read-while-write capabilities, 4KB EEPROM, 8KB SRAM, 48 general purpose I/O lines, 32 general purpose working registers, real time counter, 4 flexible timer/counters with compare modes and PWM, USART, byte oriented 2-wire serial interface, USB 2.0 low-speed and full-speed device, an 8-channel 10-bit A/D converter with optional differential input stage with programmable gain, programmable watchdog timer with internal oscillator, SPI serial port, JTAG (IEEE 1149.1 compliant) interface for on-chip debugging, and six software selectable power saving modes.

    By executing powerful instructions in a single clock cycle, the device achieves throughputs approaching 1 MIPS per MHz, balancing power consumption and processor speed.

    Like

    Reply

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