Patenting ultra-deep power-down modes

A patent application filed by Atmel was recently published on the USPTO website. Titled “Ultra-Deep Power-Down Mode for Memory Devices,” the application describes a memory device, including a voltage regulator, whose output provides a voltage supply for various other components of the memory device, including a command user interface.

“The memory device is placed into an ultra-deep power-down mode by providing to the memory device a software command, which causes the output of the voltage regulator to be disabled,” reads the patent app.


“To bring the memory device out of the ultra-deep power-down mode, a chip select signal is provided to the memory device, which includes a wake-up circuit that remains powered on even when the memory device is in the ultra-deep power-down mode. Receipt of the chip select signal while the memory device is in the ultra-deep power-down mode causes the output of the voltage regulator to be enabled, thereby providing power to the components that were completely powered down.”

The patent application also notes that ensuring low power consumption is critical for a wide range of mobile devices, including smartphones, tablets, cameras and laptops. Indeed, these devices demand the lowest power consumption possible in order to prolong battery life and enable the use of smaller, lower capacity batteries to reduce the application size, cost and weight.

That is precisely why Atmel’s patent application describes a memory device capable of operating in an ultra-deep power-down mode in which only a very small amount of current is drawn from the device. In some implementations, the ultra-deep power-down mode may allow the average current consumption to be reduced to below one micro-amp (.mu.A), and in some cases, as low as 300-400 nano-amps (nA).

Interested in learning more? You can check out Atmel’s patent application on the USPTO website here.

1 thought on “Patenting ultra-deep power-down modes

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