Designing next-gen LIN systems with Atmel (Part 2)

In the first part of this series, Bits & Pieces took a closer look at LIN, or Local Interconnect Network for vehicles. The LIN bus standard, found within the latest automotive network architectures, is a low-cost, single-wire serial communication system for distributed electronics in cars and trucks.

Essentially, LIN is highly suited for various body control applications, including power windows, mirrors, smart wipers, door locks, seat/roof/lighting control, lamps and indicators, dashboard instruments, steering wheels, climate and air-conditioning (HVAC) systems, motors, switch panels and sensors.

As we discussed in part one of this series, Atmel offers a next-generation ATA6641/42 System Basis Chip (SBC) with an 8-channel high-voltage switch interface, a LIN2.1 and SAEJ2602-2-compliant LIN transceiver and lowdrop voltage regulator. In addition, the ATA6641/42 boasts an adjustable window watchdog, facilitating the development of inexpensive, low-end, but also powerful slave and master nodes for LIN bus systems meeting the latest OEM requirements.

Two versions are available: the ATA6641 with a 3.3V voltage regulator and the ATA6642 with a 5V voltage regulator. Most features can be configured via the SPI – a 16-bit SPI interface that simplifies and accelerates configuration of the slave/master LIN node for any given application. As you can see below, Figure 3 shows a typical application using the ATA6641/42.


“The ATA6641/41’s switch interface unit consists of 8 high-side current sources. They deliver a constant current level derived from a reference value measured at the IREF pin. This pin is voltage stabilized (VIREF = 1.23V typ.) so the reference current is directly dependent on an externally applied resistor connected between IREF pin and ground,” an Atmel engineering rep told Bits & Pieces.

“The resulting current at the CSx pins is (1.23V/ RIref) x rICS. For example, with a 12K resistor between IREF and GND the value of the current at the CSx pins is 10mA (assumed IMUL = `0´ => rICS_H = 100). Fail-safe measures are able to detect both a missing as well as a short-circuited resistor. If a resistor is short-circuited, an internally generated reference current IIREFfs is used to maintain a basic level of functionality.”

Each switch input boasts a high-voltage comparator, a statechange-detection register for wake-up, interrupt request generation and a voltage divider with a low-voltage output that can be fed through to the measurement pin VDIV.

In terms of switch control, 8 high-voltage I/O ports form the heart of the ATA6641/42, making it exceptionally well suited for switch control applications with higher ESD requirements. These I/O ports allow highly flexible control of up to 8 single switches or a switch matrix or any combinations of both, as shown in figure 5, supplied by an internal current source of  5mA to 25mA. Three I/O ports can be configured either as current sources (e.g., for switches toward ground) or as current sinks (e.g., for switches toward battery); the other five pins have current sourcing capability only.


The device’s flexible switch monitoring is controlled by the application’s microcontroller (MCU). The implemented state-change detection circuitry allows configuration of each input so that it triggers an interrupt upon state change even during low-power mode. Therefore the respective current source needs to be configured so that it is controlled via the CSPWM pin. A rising edge on this pin enables the current source and delivers a stable switch read-back signal at the CS pin; a falling edge updates the switch state.

A change of state generates an interrupt request. If no wake-up should occur on a given switch—either because there is no application demand for this, or due to a failure, e.g., a hanging switch or a shorted connection line—wake-up can be prevented by disabling the current source in the SPI configuration register.


If switches are placed outside and connected via a wiring harness to the ECU, complete diagnosis of short-circuits or cable breaks can be performed. Ports that are not used for switch detection can be switched off. The device also features a high-precision current source for multi-resistor coding, while the scan current through the switches can be chosen to be sufficiently high so that the current will clean the switches.

Want to learn more about Atmel’s ATA6641/42? Be sure to check back for part three of this series, in which we’ll discuss voltage measurement, PWM control, h-bridge relays and LIN auto-addressing. Note: Part one of this series can be found here and part three here.

2 thoughts on “Designing next-gen LIN systems with Atmel (Part 2)

  1. Pingback: Designing next-gen LIN systems with Atmel (Part 3) | Bits & Pieces from the Embedded Design World

  2. Pingback: Designing next-gen LIN systems with Atmel (Part 1) | Bits & Pieces from the Embedded Design World

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