Designing next-gen LIN systems with Atmel (Part 1)

The LIN (Local Interconnect Network) bus is a vehicle standard used within the latest automotive network architectures. The low-cost, single-wire serial communication system for distributed electronics in vehicles is highly suited to body control applications, including power windows, mirrors, smart wipers, door locks, seat/roof/lighting control, lamps and indicators, dashboard instruments, steering wheels, climate and air-conditioning (HVAC) systems, motors, switch panels and sensors.

“It is primarily used as a cost-effective sub-network of a CAN bus to integrate intelligent sensor devices or actuators where the LIN master node also acts as a gateway to connect the LIN bus with the corresponding CAN bus,” an Atmel engineering rep told Bits & Pieces. “Going hand in hand with rapid LIN market growth, the requirements for greater system efficiency and lower costs exerted on LIN products have continued to increase as well.”

To be sure, in-vehicle electronic systems are rapidly evolving and increasing in number, as are the number of switches for controlling various applications. In addition, applications with switches located far away from the control electronics and wires integrated within the wiring harness require high-voltage switches.

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“And that is precisely why Atmel offers a next-generation ATA6641/42 System Basis Chip (SBC) with an eight-channel high-voltage switch interface, a LIN2.1 and SAEJ2602-2-compliant LIN transceiver and lowdrop voltage regulator,” the Atmel engineering rep continued. “The ATA6641/42 also boasts an adjustable window watchdog, facilitating the development of inexpensive, low-end, but also powerful slave and master nodes for LIN bus systems meeting the latest OEM requirements.”

Due to its optimized architecture, the ATA6641/42 provides a high degree of flexibility for deployment in various applications such as switch connection through the wiring harness, port/contact monitoring, contact cleaning, switches (towards GND or VBAT) and LED/relay/power transistor control.

Two versions of the System Basis Chip are currently available: the ATA6641 with a 3.3V voltage regulator and the ATA6642 with a 5V voltage regulator. The voltage regulator delivers up to 80mA load current. Sleep mode and active low-power mode guarantee very low current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND. To maintain very low current consumption in sleep mode, a special technique ensures that the circuit switches back to sleep mode after approximately 10ms if the bus line is floating or in case of a short circuit.

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Improved slope control at the LIN driver ensures secure data communication of up to 20kBaud, while data rates of up to 250kBaud also enable high-speed data communication. Most features can be configured via the 16-bit SPI interface which streamlines and accelerates configuration of the slave/master LIN node for any given application.

Want to learn more about Atmel’s ATA6641/42? Be sure to check out part two and three of this series.

2 thoughts on “Designing next-gen LIN systems with Atmel (Part 1)

  1. Pingback: Designing next-gen LIN systems with Atmel (Part 2) | Bits & Pieces from the Embedded Design World

  2. Pingback: Designing next-gen LIN systems with Atmel (Part 3) | Bits & Pieces from the Embedded Design World

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