In part one of this series, Bits & Pieces took a closer look at several 7/13-cell application implementations with Atmel’s ATA6870. In part two, we discuss a number of additional topics including ground offset, up-converting level shifter and down-converting level shifter.
Ground offset
Regardless of the MCU, additional circuitry must be inserted between the digital I/O pins connecting the MCU to the ATA6870 IC to compensate for the ground offset between these two devices. This offset/voltage difference occurs since the ATA6870 ground is no longer referenced to the same ground as the MCU. Meaning, the battery management MCU measures the voltage of the bottom-most cell in the battery stack, the VMCU.
The MCU also derives its supply voltage from VMCU, unlike the a standard measurement implementation where the MCU is supplied by the ATA68670 voltage regulator (VDDHVM). Due to this configuration, VMCU is now the ground reference for the bottom-most ATA6870 IC in the stack. As such, isolation between the two devices and level shifting of the digital I/O interconnections is required. A total of 6 digital I/O lines are affected by the ground offset and must be level shifted, including the SPI pins (MOSI, MISO, SCK and CS), the ADC reference clock (CLK) and the interrupt request line (IRQ).
Up-converting level shifter
Up-converting from the MCU to the ATA6870 is achieved through the use of the circuit shown in Figure 4.
All ATA6870 SPI input signals (SCK, MOSI, CS_N) and the ADC reference clock (CLK) must use this circuit. The level shifter utilizes a high-speed switching NPN transistor and voltage divider to up-convert the low-level MCU output voltage to the regulated voltage supplied by the ATA6870 IC, VDDHVM (3.3V + VMCU). It should also be noted that resistor divider values are dependent upon the voltage offset between the MCU ground, GNDMCU, and the ATA6870 ground, GND.
Down-converting level shifter
Down-converting the voltage from the ATA6870 to the MCU is accomplished by the use of the circuit shown in Figure 5.
All ATA6870 SPI output signals (MISO and IRQ) must use this circuit. The level shifter utilizes a P-channel MOSFET and a voltage divider to down-convert the ATA6870 IC’s output signal to the input voltage required by the MCU. As with the up-converted inputs, the same resistor divider rules apply.
“Since cost is the primary concern for any application, it is important to consider the type of architecture to be used. The 7/13-cell battery management application is a perfect example when it is useful to modify the system architecture in a way that completely eliminates one IC. In this case of a seven-cell application, the total IC count can be easily reduced from three ICs to two by replacing one ATA6870 circuit and the MCU with one Atmel battery measurement MCU,” Atmel engineering rep Darius Rydahl told Bits & Pieces.
“In making this architecture change to the system, the MCU and ATA6870 IC have different ground potentials, and the digital I/O pins between the two devices are offset by this difference in voltage. This offset can be easily eliminated by adding several low-cost transistors and resistors to the digital I/O lines that connect the two devices. The resulting cost-effective solution fulfills all end application requirements.”
Pingback: 7/13-cell applications with Atmel’s ATA6870 (Part I) | Bits & Pieces from the Embedded Design World